طراحي و شبيه سازي تقويت كننده ترارسانايي عملياتي دو طبقه كلاس AB با بهره DC بالا
شهربانو قربانزاده
1
(
گروه برق الكترونيك، واحد علي آباد كتول، دانشگاه آزاد اسلامي ، علي آباد كتول، ايران
)
کلید واژه: بهره DC, تقویت کننده ترارسانایی عملیاتی, پهنای باند بهره واحد, ضرایب شایستگی, نویز ارجاعی ورودی,
چکیده مقاله :
در این مقاله، یک مدار تقویت کننده ترارسانایی عملیاتی جدید دو طبقه کلاسAB پیشنهاد می‌شود. با افزایش هدایت انتقالی ترانزیستورهای ورودی، بهره تقویت کننده عملیاتی بهبود می‌یابد و از طرفی نویز ارجاعی ورودی کاهش می‌یابد. آینه های جریان غیر خطی برای بهبود نرخ چرخش استفاده شده است. با استفاده از این منابع جریان غیرخطی، برای سیگنال ورودی با دامنه زیاد میزان جریان خروجی متناسب با توان چهارم سیگنال ورودی افزایش می‌یابد. بنابراین با استفاده از این ساختار نرخ چرخش تقویت‌کننده عملیاتی بهبود می‌یابد. جبران-سازی در روش پیشنهادی به صورت هیبرید کاسکود انجام می‌شود که سابقا برای ساختار دوطبقه ارائه شده است. با استفاده از ساختار پیشنهادی، پارامترهای دیگر تقویت‌کننده نظیر پهنای باند بهره واحد و پایداری خراب نمی‌شوند.. نتایج شبیه سازی در فناوری 18/0 میکرومتر و با ولتاژ تغذیه 8/1 ولت در گوشه های دمایی و فناوری ساخت با استفاده از نرم افزار كيدنس انجام شده است. نتایج شبیه‌سازی بیانگر عملکرد بهتر تقویت‌کننده عملیاتی پیشنهادی نسبت به ساختارهای موجود است. مقدار بهره DC مدار پیشنهادی بعد از شبیه‌سازی پساجانمایی برابر 5/93 دسی‌بل است. برای این منظور از ضرایب شایستگی نیز جهت مقایسه استفاده شده است
چکیده انگلیسی :
In this paper, a new two-stage class AB operational transconductance amplifier circuit is proposed. By increasing the transconductance of the input transistors, the gain of the operational amplifier is improved and on the other hand, the reference noise of the input is reduced. Non-linear current mirrors have been used to improve the slew rate. By using these non-linear current sources, for an input signal with a large amplitude, the amount of output current increases proportionally to the fourth power of the input signal. Therefore, by using this structure, the slew rate of the operational amplifier is improved. In the proposed method, compensation is done in the form of a hybrid cascode, which was previously presented for a two-story structure. By using the proposed structure, other amplifier parameters such as unit gain bandwidth and stability are not damaged. The simulation results have been done in 0.18 micrometer technology and with 1.8V supply voltage in temperature corners and manufacturing technology using Cadence software. The simulation results show the better performance of the proposed operational amplifier compared to the existing structures. The value of DC gain of the proposed circuit after the post-placement simulation is equal to 93.5 dB. For this purpose, merit coefficients have also been used for comparison 1.8V supply voltage
[1] S. Ghosh and V. Bhadauria, “High current efficiency single-stage bulk-driven subthreshold-biased class- AB OTAs with enhanced transconductance and slew rate for large capacitive loads,” Analog Integrated Circuits and Signal Processing, vol. 109, no. 22, pp. 403-433, 2021, doi: 10.1007/s10470-021-01929-5.
[2] T. B.Kumar, S. K.Kar and D. Boolchandani, “A wide linear range CMOS OTA and its application in continuous-time filters,” Analog Integrated Circuits and Signal Processing, vol. 103, no. 2, pp. 283–290, 2020, doi: 10.1007/s10470-020-01621-0.
[3] B. Wen, Q. Zhang and X. Zhao “A two-stage CMOS OTA with enhanced transconductance and DC-gain,” Analog Integrated Circuits and Signal Processing, vol. 98, no. 2, pp. 257–264, 2019, doi: 10.1007/s10470-018-1281-7.
[4] M.P. Garde, A.J. Lopez-Martin, R.G. Carvajal, J.A. Galan and J. Ramirez-Angulo “Super class AB RFC OTA using non-linear current mirrors,” Electronics Letters, vol. 54, no. 22 , pp. 1317-1318, 2018.
[5] T. Kulej and F. Khateb “A Compact 0.3-V Class AB Bulk-Driven OTA, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 1, pp. 224 -232, 2020, doi: 10.1109/TVLSI.2019.2937206.
[6] S. Pourashraf, J. Ramirez-Angulo, A. Roman-Loera and M. Gangineni, "Gain and Bandwidth Enhanced Class-AB OTAs," IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS), Dallas, TX, USA, 2019, pp. 778-781, doi: 10.1109/MWSCAS.2019.8885270.
[7] L. H. C. Ferreira, T. C. Pimenta and R. L. Moreno, “An ultra-low-voltage ultra-low-power CMOS Miller OTA with rail-to-rail input/output swing,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 54, no. 10, pp. 843–847, 2007, doi: 10.1109/TCSII.2007.902216.
[8] G. Raikos and S. Vlassis, “Low-voltage bulk-driven input stage with improved transconductance, International journal of Circuit Theory and Applicational, vol. 39, no. 3, pp. 327–39, 2011, doi: 10.1002/cta.637.
[9] L. H. C. Ferreira and S. R. Sonkusale, "A 60-dB Gain OTA operating at 0.25-V power supply in 130-nm digital CMOS process," IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne, VIC, Australia, 2014, pp. 1881-1884, doi: 10.1109/ISCAS.2014.6865526.
[10] B. K. Thandri and J. Silva-Martinez, "A robust feedforward compensation scheme for multistage operational transconductance amplifiers with no Miller capacitors," in IEEE Journal of Solid-State Circuits, vol. 38, no. 2, pp. 237-243, Feb. 2003, doi: 10.1109/JSSC.2002.807410.
[11] L. G. A. Callewaert and W. M. C. Sansen, "Class AB CMOS amplifiers with high efficiency," in IEEE Journal of Solid-State Circuits, vol. 25, no. 3, pp. 684-691, June 1990, doi: 10.1109/4.102661.
[12] J. A. Galan, A. J. Lopez-Martin, R. G. Carvajal, J. Ramirez-Angulo and C. Rubia-Marcos, "Super Class-AB OTAs With Adaptive Biasing and Dynamic Output Current Scaling," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 54, no. 3, pp. 449-457, March 2007, doi: 10.1109/TCSI.2006.887639.
[13] A. J. Lopez-Martin, S. Baswa, J. Ramirez-Angulo and R. G. Carvajal, “Low-voltage Super Class AB CMOS OTA cells with very high slew rate and power efficiency,” IEEE J. Solid-State Circuits, vol. 40, no. 5, pp. 1068–1077, 2005, doi: 10.1109/JSSC.2005.845977.
[14] M. P. Garde, A. Lopez-Martin, R. G.Carvajal et al., “Super class AB recycling folded cascode OTA,” IEEE Journal of Solid-State Circuits, vol. 53, no. 9, pp. 2614–2623, 2018, doi: 10.1109/JSSC.2018.2844371.
[15] M. P. Garde, A. Lopez-Martin, R. G. Carvajal et al., “Super class AB RFC OTA with adaptive local common-mode feedback,” Electron. Lett., vol. 54, no. 22, 2018, doi: 10.1049/el.2018.6362.
[16] A. P. Perez, Y. B. Nithin Kumar, E. Bonizzoni and F. Maloberti, "Slew-rate and gain enhancement in two stage operational amplifiers," IEEE International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, 2009, pp. 2485-2488, doi: 10.1109/ISCAS.2009.5118305.
[17] S. Sutula, M. Dei, L. Terés and F. Serra-Graells, "Variable-Mirror Amplifier: A New Family of Process-Independent Class-AB Single-Stage OTAs for Low-Power SC Circuits," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, no. 8, pp. 1101-1110, Aug. 2016, doi: 10.1109/TCSI.2016.2577838.
[18] A. Lopez-Martin, J. M. Algueta, M. P. Garde, R. G. Carvajal and J. Ramirez-Angulo, "1-V 15-μW 130-nm CMOS Super Class AB OTA," IEEE International Symposium on Circuits and Systems (ISCAS), Seville, Spain, 2020, pp. 1-4, doi: 10.1109/ISCAS45731.2020.9180690.
[19] J. Roh, “High-gain class-AB OTA with low quiescent current,” Journal Analog Integr. Circuits Signal Process , vol. 47, no. 2, pp. 225–228, 2006, doi: 10.1007/s10470-006-4959-1.
[20] R. S. Assaad and J. Silva-Martinez, "The Recycling Folded Cascode: A General Enhancement of the Folded Cascode Amplifier," in IEEE Journal of Solid-State Circuits, vol. 44, no. 9, pp. 2535-2542, Sept. 2009, doi: 10.1109/JSSC.2009.2024819.
[21] M.Yavari and T. Moosazadeh, “A single-stage operational amplifier with enhanced transconductance and slew rate for switched-capacitor circuits,” Journal. Analog Integr. Circuits Signal Process., vol. 79, no. 3, pp. 589–598, 2014, doi: 10.1007/s10470-014-0292-2.
[22] M. Yavari, “Hybrid cascode compensation for two-stage CMOS op-amps,” IEICE trans. Electronics., vol. 88, no. 6, pp. 1161-1165, 2005, doi: 10.1093/ietele/e88–c.6.1161.
[23] S. M. Anisheh and H. Shamsi “Two-stage class-AB OTA with enhanced DC gain and slew rate,” International Journal of Electronics Letters, vol. 5, no. 4, pp. 438-448, 2016, doi: 10.1080/21681724.2016.1253780.
[24] J. Guo, , M. Ho, KY., Kwong and KN. Leung, “Power-area-efficient transient-improved capacitor-free FVF-LDO with digital detecting technique,” Electronics Letters, vol. 51, no. 1, pp. 94–96, 2015, doi: 10.1049/el.2014.3330.
[25] M. J. M. Pelgrom, A. C. J. Duinmaijer and A. P. G. Welbers, "Matching properties of MOS transistors," in IEEE Journal of Solid-State Circuits, vol. 24, no. 5, pp. 1433-1439, Oct. 1989, doi: 10.1109/JSSC.1989.572629.
[26] A. D. Grasso, G. Palumbo and S. Pennisi, "Three-Stage CMOS OTA for Large Capacitive Loads With Efficient Frequency Compensation Scheme," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 53, no. 10, pp. 1044-1048, Oct. 2006, doi: 10.1109/TCSII.2006.882231.
[27] A. D. Grasso, G. Palumbo and S. Pennisi, "Advances in Reversed Nested Miller Compensation," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 54, no. 7, pp. 1459-1470, July 2007, doi: 10.1109/TCSI.2007.900170.
