یک ضرب¬کننده چهاربیتی بهینه¬سازی شده با استفاده از روش ورودی دروازه شناور انتقالی
محورهای موضوعی : مهندسی الکترونیک
جواد حسن لی
1
,
نبي اله شیری
2
,
فرشاد پسران
3
1 - دانشجو
2 - استاد دانشکاه آزاد شیراز-صدرا
3 - دانشگاه آزاد اسلامی، واحد شیراز
کلید واژه: ضرب¬کننده, دروازه انتقال, ورودی گیت شناور, بهینه¬سازی,
چکیده مقاله :
ضربکنندهها بهصورت گستردهای در مدارهای محاسباتی استفاده میشوند و بهینهسازی آنها تاثیر قابل توجهی بر سرعت محاسبات و سیستمهای کامپیوتری دارد. در این مقاله، یک ضربکننده چهاربیتی با استفاده از روش دروازههای انتقال و ورودی گیت شناور بهینهسازی میشود. روش ورودی گیت شناور باعث کاهش تعداد ترانزیستورها، تاخیر انتشار، توان تلفاتی و مساحت تراشه میشود. همچنین استفاده از روش دروازه انتقال باعث جبران خطای سویینگ در خروجی ضربکننده میشود. ضربکننده بهینهسازی شده در تکنولوژی 90 نانومتر بررسی میشود. نتایج نشان میدهد که ضربکننده دارای توان تلفاتی 09/6 میکرووات، 146/6 نانوثانیه تاخیر و 200 × 200 میکرومترمربع مساحت میباشد. همچنین مقدار حاصلضرب توان در تاخیر مدار برابر با 15-10 × 43/37 است. ضربکننده بهینهسازی شده برای پردازشگرهای سیگنال دیجیتال با راندمان بالا قبل استفاده میباشد.
Arithmatic units in high-speed cores usually contain digital multipliers, and their optimization has a significant impact on the speed of arithmetic and computer systems. Different design techniques have been presented in the research. In this study, a 4-bit multiplier is optimized using transmission gate (TG) and gate diffusion input (GDI) techniques. The GDI technique reduces the number of transistors, propagation delay, power consumption, and chip area. Also, using the TG technique compensates for the swing error at the output of the multiplier. The optimized multiplier is evaluated by 90 nm technology. The results show that the multiplier has 6.09 µW power consumption, 6.146 ns delay, and 200 × 200 µm2 area. Also, the value of PDP (Power Delay Product) of the circuit is equal to 37.45×10-15. The optimized multiplier applies to efficient digital signal processors (DSPs) where high performance is required.
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